Please Note:

To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period.

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Samsung Semiconductor is hiring now for a Staff Engineer, Memory Systems Architecture. The conventional DRAM failure analysis was physical electrical FA and physical FA. But, in the era of Data center, it is easier to track the field failure information. With this data set, Fault management team’s role is finding DRAM failure mode, abnormality and failure rate projection.

You will be part of an incubation team working on in-field telemetry intended to transform the Customer Quality Experience for Samsung memory products. Fault Management is the future of quality to minimize system downtime within AI/ML hardware deployments and workloads of the future. We analyze trends and patterns from enormous memory fleet telemetry to bucketize failures and perform virtual root-cause analysis. Telemetry analysis helps us design solutions to proactively avoid system downtime. We conduct research and develop both in-house and collaboratively in the industry with the opportunity to publish our findings through whitepapers and conferences. We are looking for innovative and passionate thinkers who can work in a start-up environment and are excited to shape the future of data centers around the world. Join us in our mission!

What You'll Do

Based on the knowledge of SOC controller and memory operation including RAS feature, find and recommends better solution to mitigate the field DRAM failure rate.
Needs to communicate better ECC scheme to customers based on Samsung DRAM failure mode(DQ and burst)
Interface with customers to establish the value add of enabling in-field fault management architecture
Contribute to the standardization of DRAM/HBM failure logging in the OCP.
Propose and develop platform RAS (Reliability Availability Serviceability) algorithms for memory fault management such as page offlining, hPPR and conduct POC with known failure DIMMs in the real server and application.

Please Note:

To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period.

Advancing the World’s Technology Together

What You'll Do

Based on the knowledge of SOC controller and memory operation including RAS feature, find and recommends better solution to mitigate the field DRAM failure rate.
Needs to communicate better ECC scheme to customers based on Samsung DRAM failure mode(DQ and burst)
Interface with customers to establish the value add of enabling in-field fault management architecture
Contribute to the standardization of DRAM/HBM failure logging in the OCP.
Propose and develop platform RAS (Reliability Availability Serviceability) algorithms for memory fault management such as page offlining, hPPR and conduct POC with known failure DIMMs in the real server and application.

Staff Engineer, Memory Systems Architecture

Staff Engineer, Memory Systems Architecture

Samsung

Samsung

Benefits

Samsung